
9 – Maintenance
DPN 402197 © TSS (International) Ltd Page 7 of 26
9.1.2.3 Power Supply
Power for the sub-sea components of the 350 System comes from the ROV electrical
distribution system. The standard configuration for the sub-sea 350 System accepts
an electrical supply in the range 110 to 120V at 45 to 65Hz. An alternative SEP is
available from TSS for use with installations that must operate from an electrical sup-
ply in the range 220 to 240V.
WARNING
Do not attempt to modify the SEP to use an incorrect electrical supply. A label on the
SEP identifies the correct SEP operating voltage.
The power supply circuit provides conditioned and stabilised voltages of +24V, +15V,
–15V and +5V to drive all the components of the sub-sea installation (the SEP, the
coil pre-amplifiers and an altimeter connected to the SEP).
Cooling of the supply is by direct thermal conduction to the SEP housing assisted by
a small fan.
WARNING
There is a danger of electric shock from mains voltages on the Power Supply board.
Do not open the SEP with power connected. Except for the fuse on its input, the Power
Supply board is NOT field repairable. You must renew the Power Supply board as a
complete unit if you suspect it has developed a fault.
9.1.3 Current Loop
When you configure the System to use the 2-wire current-loop communications
method, the SEP and the SDC share a twisted pair in the umbilical. To avoid possible
contention, the 350 System assigns ‘Master’ status to the SDC, and ‘Slave’ status to
the SEP.
Immediately after you power-on the 350 System, the SEP transmits a short ‘banner’
message to the SDC and then waits for commands to arrive. Other than its initial ban-
ner message, the SEP will not transmit data until it receives a carriage-return signal
from the SDC.
The SEP Processor Board generates current at 20mA for the communication loop.
The ‘COMMS’ LED on the SDC is in series with the current-loop and therefore con-
firms that the communication loop is intact when it shows red. Note that the COMMS
LED does NOT confirm successful communication between the SEP and SDC, but
shows only that the loop is intact.
Figure 9–2 shows a simplified schematic of the current-loop, including the optically
isolated I/O ports at both ends of the umbilical cable.
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